512 MB PC2700 333 MHz

M368L3223CTL - DDR SDRAM 184 pinna DIMM 64Mx64 DIMM

HELSTU KOSTIR SAMSUNG Double Data Rate(DDR333):

Samsung M368L3223CTL er 64 Mbit x 64 Double Data Rate SDRAM háþróuð minniseining. Samsung M368L3223CTL er gerð úr átta CMOS 32M x 8 bit með 4 bönkum af Double Data Rate SDRAM í 66pinna TSOP-II(400mil) pakkningum, sett á 184pinna gler-epoxy efni. Fjórir 0.1 µF aftengingarþéttar eru á prentrásinni samhliða hverri DDR SDRAM. M368L3223CTL er Dual In-line minniseiningar og gerð fyrir ísetningu í 184ra pinna sökkul.

Samhæfð hönnun gerir nákvæma riðastýringu mögulega með notkun kerfisklukkunnar. Inngangs- og útgangsgagnaflæðið stjórnast bæði af for- og bakkanti DQS. Breytt svið aðgerðatíðna sem eru forritanlegar, gerir mögulegt að sama tækið verði nýtilegt fyrir mismunandi bandbreiddir og að úr verði afkastamikil minniskerfisnotkun.

Helstu eiginleikar:

• Vinnusvið - Aflgjafi: Vdd: 2.5V ?0.2V, Vddq: 2.5V ?0.2V
• Double-data-rate byggingarlag; tvær gagnaflutningsbylgjur á hvert klukkurið
• Bidirectional data strobe(DQS)
• Differential clock inputs(CK and /CK)
• DLL aðlagar DQ og DQS púlsa við CK púlsa
• Forritanleg Read latency 2, 2.5 (clock)
• Forritanleg Burst length (2, 4, 8)
• Forritanleg Burst type (sequential & interleave)
• Kantstilltur gagnaútgangur, miðstilltur gagnainngangur
• Auto & Self refresh, 7.8us endurnýjunartími(8K/64ms refresh)
• Serial presence detect with EEPROM
• PCB : Height 1250 (mil), rásir á báðum hliðum

Product Information

SAMSUNG Double Data Rate(DDR333) Advantage:

Samsung 64M bit x 64 Double Data Rate SDRAM high density memory modules. The Samsung consists of 16 CMOS 32M x 8 bit with 4banks Double Data Rate SDRAMs in 66pin TSOP-II(400mil) packages mounted on a 184pin glass-epoxy substrate. Four 0.1uF decoupling capacitors are mounted on the printed circuit board in parallel for each DDR SDRAM. It is Dual In-line Memory Modules and inten-ded for mounting into 184pin edge connector sockets.

Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges of DQS. Range of operating frequencies, programmable latencies and burst lengths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.

Features

Performance Range

Power supply : Vdd: 2.5V ?0.2V, Vddq: 2.5V ?0.2V

Double-data-rate architecture; two data transfers per clock cycle

Bidirectional data strobe(DQS)

Differential clock inputs(CK and /CK)

DLL aligns DQ and DQS transition with CK transition

Programmable Read latency 2, 2.5 (clock)

Programmable Burst length (2, 4, 8)

Programmable Burst type (sequential & interleave)

Edge aligned data output, center aligned data input

Auto & Self refresh, 7.8us refresh interval(8K/64ms refresh)

Serial presence detect with EEPROM

PCB : Height 1250 (mil), double sided component

Compatiable with the latest Intel P4 and AMD Motherboards...

ABIT--SD7, SD7 Plus

ASUS--P4S333, P4S333-FX

BIOSTAR--M7SXF, M7SXR, M7SXG, M7SX

CHAINTECH--9SID, 9SJD, 9SID1

ECS--L4S5M, L4S5MG, K7S6A

EPoX--4SDA

Gigabyte--GA-8SDX3, GA-8SRX

Iwill--XP333, XP333-R (ALi MAGiK 1 M1647 C-version)

JETWAY--S445R, S445

MSI--M6547, M6559, M6524, M6558

SOYO--P4S Dragon Ultra

• Also work in AMD platform motherboards which use SIS740/745, VIA P4X266, ALi MAGiK 1 & Intel P4 845D, SIS645/650 chipsets.
• This high quality memory is compatible with all computers using DDR standard, but is not backward-compatible with SDRAM such as PC66, PC100, PC133, PC150, and requires motherboards and systems especially designed for DDR266 and DDR333.

**DDR SDRAM provides twice the memory bandwidth of earlier PC100 and PC133 DRAM solution. This bandwidth improvement is reached by tranferring data on both the rising and falling edge of clock cycle.

***It enables enhanced multimedia capabilities, increases PC headroom for memory-intensive applications and enhances server capabilities for faster data mining.